1. Field of the Invention
The present invention relates to a load driving technique, and particularly to a load driving technique on the basis of a pulse signal whose duty ratio is changed.
2. Description of the Related Art
To drive a DC (direct current) motor or a spindle motor with a desired revolution, a motor driving apparatus monitors the revolution of the motor and produces a driving signal on the basis of the deviation from a desired target value. The motor driving apparatus that controls a motor as described above may employ a speed discriminator disclosed in the Patent Document 1, for example.
Some of the speed discriminators compare a current revolution of the motor and a revolution that is a desired target value, and outputs an error signal according to the deviation as a digital value. This error signal produces a pulse-width modulation signal having a duty ratio according to the digital value of the error signal after a high-frequency component of the error signal is eliminated with the use of a low-pass digital filter. And the error signal feedback-controls the time for energizing the motor, on the basis of the pulse-width modulation signal, so as to stabilize the revolution at the target value.    [Patent Document 1] Japanese Patent Application (Laid-Open) No. H06-30589
For example, the duty ratio of the pulse-width modulation signal is set by counting a clock signal in such a manner that the duty ratio becomes 100% when a digital error signal has a maximum value, and the duty ratio becomes 0% when the error signal has a minimum value. It is supposed, for example, that the error signal is n bit and its value is “a” in decimal notation. In this case, supposing that the cycle of the clock signal is Tck, the cycle of the pulse-width modulation signal is set to 2n×Tck, and its ON-period is set by counting the clock signal Tck 2a times.
On the other hand, there is a demand that the cycle of the pulse-width modulation signal is shortened from the viewpoint of driving efficiency in the motor driving circuit. However, when the pulse-width modulation signal is generated by utilizing the clock signal with the aforesaid method, it is necessary that the cycle of the clock signal is reduced and therefore the frequency of the clock signal is set to be high in order to shorten the cycle of the pulse-width modulation signal. When the clock signal having high frequency is generated, however, a problem arises that the affect of the clock signal as a noise increases. Further, it is difficult to generate the clock signal having high frequency in the motor driving circuit due to the restriction of a circuit area or the like. Providing an oscillator at the outside might bring increased cost.